AMD Bulldozer with 8MB L3 Cache to Work at 4 GHz Via Turbo Core 2

         There has been much talk of AMD's future line of processors, the Bulldozer architecture especially, and it appears that, provided a certain report is genuine, the desktop units will feature fairly high speeds, among other things.






Computerbase appears to have stumbled upon some of what Advanced Micro Devices plans to speak about at the ISSCC 2011 conference.



Apparently, the Bulldozer architecture will spawn chips with base clock frequencies of 3.5 GHz and cache memory of 8 MB L3.



In fact, said processors will supposedly be able to go significantly higher with the aid of the Turbo Core 2 technology, which will boost the core clocks by up to an extra 500 MHz.



Essentially, this makes the maximum achievable clock speed 4 GHz, which is significant for a module with two cores that have a total of 213 million transistors.



“The Bulldozer 2-core CPU module contains 213M transistors in an 11-metal layer 32nm high-k metalgate SOI CMOS process and is designed to operate from 0.8 to 1.3V,” states AMD's ISSCC plan.



“This micro-architecture improves performance and frequency while reducing area and power over a previous AMD x86-64 CPU in the same process. The design reduces the number of gates/cycle relative to prior designs, achieving 3.5GHz+ operation in an area (including 2MB L2 cache) of 30.9mm2 [...]”



“An 8MB level 3 cache, composed of 4 independent 2MB subcaches, is built on a 32nm SOI process. It features column-select aliasing to improve area efficiency, supply gating and floating bitlines to reduce leakage power, and centralized redundant row and column blocks to improve yield and testability. The cache operates above 2.4GHz at 1.1V.”



The ISSCC 2011 conference will take place between 20 and 24 February and will see AMD talking about this and some other issues related to the Bulldozer architecture, among other things.